Etiqueta de registo: 00000nam 2200025 450
001 1916970
003 http://id.bnportugal.gov.pt/bib/catbnp/1916970
100 ## $a20151202d2015 k y0pory01030103ba
101 0# $aeng$dpor
102 ## $aPT
105 ## $aa m 000yy
106 ## $ar
200 1# $aPlacement, routing and parasitic extraction techniques applied to analog IC design automation$fRicardo Miguel Ferreira Martins$gsupervisor Nuno Cavaco Gomes Horta
210 #9 $aLisboa$c[s.n.],$d2015
215 ## $aXXVI, 186 p.$cil.$d30 cm
320 ## $aBibliografia, p. 171-180
328 #1 $aTese dout. Electrical and Computer Engineering, Instituto Superior Técnico, Universidade de Lisboa, 2015
675 ## $a681.5(043)$vBN$zpor$3297997
675 ## $a007(043)$vBN$zpor$3480725
700 #1 $aMartins,$bRicardo Miguel Ferreira$31628666
702 #1 $aHorta,$bNuno Cavaco Gomes,$f1965-$4727$383100
801 #0 $aPT$bBN$gRPC
966 ## $lBN$mFGMON$sS.A. 160134 V.$x1

Etiqueta de registo: 00000nam 2200025 450
001 2288912
003 http://id.bnportugal.gov.pt/bib/catbnp/2288912
100 ## $a20260626d2026 k y0pory01030103ba
101 0# $aeng$dpor
102 ## $aPT
105 ## $aa m 000yy
106 ## $ar
200 1# $aDeep Learning techniques for analog integrated circuit placement$fAntónio Paiva Lapas de Gusmão$gorient. Nuno Cavaco Gomes Horta, Ricardo Miguel Ferreira Martins, Nuno Calado Correia Lourenço
210 #9 $aLisboa$c[s.n.],$d2026
215 ## $aXXVIII, 187 p.$cil.$d30 cm
328 #1 $aTese dout. Electrical and Computer Engineering, Instituto Superior Técnico, Universidade de Lisboa, 2026
675 ## $a004.85(943)$vBN$zpor$32002499
700 #1 $aGusmão,$bAntónio Paiva Lapas de$32001793
702 #1 $aHorta,$bNuno Cavaco Gomes,$f1965-$4727$383100
702 #1 $aMartins,$bRicardo Miguel Ferreira$4727$31628666
702 #1 $aLourenço,$bNuno Calado Correia$4727$31378004
801 #0 $aPT$bBN$gRPC
966 ## $lBN$mFGMON$sP. 73141 V.$x1
971 ## $corlando$d20260626
973 ## $cigoulao$d20260702