Etiqueta de registo: 00000nam 2200025 450
001 1962894
003 http://id.bnportugal.gov.pt/bib/catbnp/1962894
100 ## $a20170518d2015 k y0pory01030103ba
101 0# $aeng$dpor
102 ## $aPT
105 ## $aa m 000yy
106 ## $ar
200 1# $aHybrid hypervisor partially deployed on FPGA$fPaulo Fernando Rocha Garcia$gorient. Adriano José Conceição Tavares, João Luis Marques Pereira Monteiro
210 #9 $a[Braga$cs.n.],$d2015
215 ## $aXXIV, 139 p.$cil.$d30 cm
328 #1 $aTese dout. Engenharia Eletrónica e Computadores, Escola de Engenharia, Univ. do Minho, 2015
675 ## $a004.3(043)$vBN$zpor$31227412
700 #1 $aGarcia,$bPaulo Fernando Rocha$31681109
702 #1 $aTavares,$bAdriano José da Conceição,$f1964-$4727$3123603
702 #1 $aMonteiro,$bJoão Luís,$f1957-$4727$398074
801 #0 $aPT$bBN$gRPC
966 ## $lBN$mFGMON$sP. 47883 V.$x1